First board bring-up checklist

A working list for the first power-up of a new board, for teams doing their own bring-up. The goal is to power the first board without damage, then learn as much as possible from this spin.

Do the first section before the boards arrive. After that, work in order and keep notes for each board as you go.

Ticks are saved in this browser only. To keep a record, use the print button to print or save a PDF: it includes your ticks.

Project
Revision
Reviewed by
Date

1Before boards arrive

1.1A written bring-up plan lists the order of steps, what working means for each, and the equipment each needs.Power first, then clocks and reset, then the processor, then each subsystem.
1.2Equipment is on hand: current-limited bench supply, multimeter, a scope with enough bandwidth, a logic analyzer, and the probes and adapters to reach the board.
1.3The debug probe and programming tools are proven on a development kit with the same processor.
1.4Bring-up firmware is ready: a minimal image that blinks an LED, prints over serial, and tests each peripheral on its own.
1.5Supply voltage and current limit are worked out for each input, with the limit just above the expected startup current.Too high and a short can burn a trace; too low and the board never starts.
1.6Expected current and resistance to ground are noted for each rail, so an abnormal reading stands out.
1.7A harness or breakout that reaches every interface is built.
1.8A log is set up for each board serial number: measurements, issues, and rework.

2Inspection

2.1Parts, orientation, polarity, and pin 1 match the assembly drawing, and DNP parts are absent.
2.2Solder joints are inspected under magnification, with X-ray for BGAs and other bottom-terminated parts where available.
2.3Resistance to ground is measured on every rail before power and compared across several boards.A short or near-short shows up here as a reading, not as smoke.
2.4Neighboring rails are checked for shorts between them.
2.5A board is test-fitted in the enclosure or a 3D print: mounting holes, connectors, buttons, and tall parts.

3First power

3.1The first board is powered from a current-limited supply set just above the expected current.
3.2Rails are brought up one at a time where the board allows, with downstream loads isolated through links.
3.3Input current is recorded and compared with the estimate before going further.
3.4Each rail voltage is measured at the load, not only at the regulator.Drops across traces, links, and connectors show up only at the far end.
3.5No part runs hot, checked with a thermal camera or a careful touch.
3.6Sequencing and ramp times are captured on a scope and meet every chip requirement.
3.7Ripple and noise are measured on each rail with a short ground connection at the probe tip.A long ground lead picks up switching noise that is not on the rail.
3.8The board starts reliably over many power cycles, with both fast and slow supply ramps.

4Clocks and reset

4.1Reset releases only after the rails are stable, with a clean edge and no glitches.
4.2Every oscillator runs at the right frequency, measured at a clock-output pin or buffered test point.
4.3Boot and strap pins are at their intended levels when reset releases.
4.4A supply that sags slowly or drops quickly causes a clean reset and recovery.

5Programming and debug

5.1The debug probe connects and reads the device ID, and serial log output works.
5.2Flash programs and verifies, and option bytes and fuses are as intended.Check that read protection or debug lock was not set by accident.
5.3Firmware reads the board revision correctly.
5.4The board recovers from an interrupted or bad firmware load.

6Peripherals

6.1Each subsystem is brought up on its own, in the planned order, against a written pass criterion.
6.2Every bus is checked with a logic analyzer and a scope: addresses, levels, and rise times with the actual pull-ups.A logic analyzer shows the protocol; only a scope shows slow edges and ringing.
6.3Memory passes full read and write patterns across its whole range.A single location can pass with swapped or shorted address lines.
6.4High-speed links are checked for signal quality at the receiver and error counts over long runs.
6.5Analog inputs are checked for noise, offset, and gain against a known reference.
6.6Every connector is exercised with the real cable or mating hardware, including hot-plug where the product allows it.
6.7Buttons, LEDs, displays, sensors, and actuators work, with motors tested under load.

7RF

7.1Conducted output power, frequency error, and harmonics are measured through the test connector.
7.2The antenna match is measured and tuned on assembled boards inside the enclosure.A match tuned on a bare board shifts once the enclosure, battery, and hand are near it.
7.3Radiated performance is checked in a chamber, or at least with comparative range tests.A good match alone does not prove the antenna radiates well.
7.4Receiver sensitivity or packet error rate is checked at low signal levels.
7.5Radio performance holds with the rest of the board active: regulators, displays, and fast clocks.

8Power consumption

8.1Current is measured in each operating mode, rail by rail, and compared with the power budget.
8.2Sleep current is measured with the debugger removed and the device power-cycled.On some processors, debug logic keeps running until the next power cycle.
8.3Burst currents are captured with an instrument fast enough to see them, and the supply stays above brown-out.
8.4Any gap between measurement and budget is traced: pull-ups, floating inputs, back-powered chips, LEDs.
8.5Long captures include rare events such as reconnects, retries, and update checks.Rare events can dominate the average current.

9Early compliance checks

9.1A near-field probe scan finds the noisiest areas and cables.Emissions problems found now can still be fixed in the next layout.
9.2Exposed connectors and buttons are tried with an ESD simulator.
9.3Temperatures are checked in the closed enclosure at the highest expected ambient.

10Issues and rework

10.1Each issue is logged with the board, symptom, root cause, fix, and status.
10.2Every rework is recorded against the board serial number, with what changed, why, and a photo.
10.3A fix is proven on more than one board before it counts as fixed.A fix that works on one board may only be hiding a marginal part.
10.4Key measurements are repeated on several boards to see the spread.

11For the next spin

11.1Every schematic, layout, and value change is listed and tied to the issue behind it, including values changed on the bench.
11.2Measured results are fed back into the power budget and the requirements.
11.3Bring-up aids to keep or remove (jumpers, links, test headers) are decided deliberately.Until the design is stable, they are cheap insurance on the next spin too.
11.4A short review records what was tested, what failed, the root cause, and who owns each fix.

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